In semiconductor device fabrication processes, thin layers of semiconductor material are provided on recipient structures for various purposes including, for example, fabrication of semiconductor-on-insulator (SeOI) type substrates, and to vertically stack semiconductor materials and devices in so-called “three-dimensional (3D) integration” processes.
In such processes, it may be desirable to provide a layer of semiconductor material on a recipient structure that has an average layer thickness as small as several hundred nanometers or less, and even one hundred nanometers (100 nm) or less in some applications. Also, it is desirable that the layer of semiconductor material have a uniform thickness (e.g., a non-uniformity being less than 5% of a thickness of the layer of semiconductor material. Additionally, it may be desirable that the layer of semiconductor material be extremely smooth. For example, it may be desirable to form the layer of semiconductor material such that the exposed major surface of the layer of semiconductor material has a surface roughness (Ra) as low as five nanometers (5 nm) or less.
Various methods of providing such thin and smooth layers of semiconductor material on recipient structures have been proposed in the art. There remains a need in the art, however, for improved methods that enable a thin, uniform and smooth layer of semiconductor material to be provided on a recipient structure.